#ifndef _DATA_MOVE_H_
#define _DATA_MOVE_H_
#include <stddef.h>
#include <stdint.h>
#include "drv_spiflash.h"

#define  SUCCESS                            0
#define  FAILURE                            -1

#define  DDR_SIZE                           0x8000000           /* 128M */ 
#define  DDR_START                          0
#define  DDR_END                            (DDR_START + DDR_SIZE - 1) 
#define  CK805_ITCM_START                   CSKY_805_ITCM 
#define  CK805_DTCM_START                   CSKY_805_DTCM
#define  MAGICNUM                           0x4e5a5751          /* QWZN */

#define COPY_DATA_SIZE_MAX                (1024 * 1024 * 3)
#define QSPI_APP_STORE_BASEADDR           0xC001A000
//lfcui
#define QSPI_START_BASEADDR               0xC0000000
#define QSPI_SENSOR_PARAM_BASEADDR        0xC02DA000
#define FLASH_PIC_SPK_BASE_SIZE           225*1024
#define WRITE_DATA_SIZE_MAX               (1024 * 4)
#define QSPI_REGISTER_TYPE                QSPI_SENSOR_PARAM_BASEADDR+FLASH_PIC_SPK_BASE_SIZE+sizeof(int)+sizeof(double)

typedef struct{
    uint32_t magic;
    uint32_t load_addr; 
    uint32_t img_len;
    uint32_t res;
}img_head_t;

typedef struct{
    uint32_t store_off;
    uint32_t mem_size;
}store_mem_t;

/***
 * brief set frequency for qspi controller
 */
void set_qspi_freq(void); 
/**
 * @brief  initialize dma
 */
int memcpy_dma_init();

/**
 * @brief  relese dma
 */
void memcpy_dma_release();

/**
 * @brief  bug: data length should  be less 4K
 * 
 */
int memcpy_dma(void *dst, void *src, size_t len);

/**
 * @brief  check the flag 
 */
int  memcpy_dma_is_done(void);

/**
 * @brief  there are a delay (ms)
 */
int memcpy_with_sleep(uint8_t* dst, uint8_t* src, uint32_t size);

int32_t copy_img(store_mem_t *store_mem, uint32_t boot_base, uint32_t *target_addr);

int qspi_flash_write(uint32_t offset, uint8_t *writeData, uint32_t size);

#endif

